This application is based upon and claims the benefit of priority from the prior Japanese Patent Applications No. 11-185860, Jun. 30, 1999; and No. 11-185863, Jun. 30, 1999, the entire contents of which are incorporated herein by reference.
The present invention relates to a semiconductor device and, more particularly, to a semiconductor device using a poly-crystalline silicon (polysilicon) layer as an active region. More specifically, the first aspect of the present invention relates to a semiconductor device circuit for compensating for poor saturation characteristics of a field effect transistor having a MIS (Metal Insulator Semiconductor) structure (including a MOS (Metal Oxide Semiconductor) structure), i.e., MISFET, which are caused by using a polysilicon layer as an active region or by other causes. This circuit is used to improve the I/O (Input/Output) characteristics of a comparator circuit or logic gate circuit. The second aspect of the present invention relates to a semiconductor protection device for suppressing a current flowing through a main semiconductor switch to a set value or less and, more particularly, to a semiconductor protection device integrated on the same substrate as the main semiconductor switch in a power conversion system.
Prior arts concerning the first aspect will be described. As a technique of increasing the integration degree of a semiconductor device and forming a protection circuit on the same chip as a power device, a method of forming a polysilicon semiconductor layer via an insulating film on a single-crystalline silicon substrate layer for forming a power device, and forming a poly-crystalline MOSFET or the like using this semiconductor layer as an active region has been examined. This method can reduce the cost more greatly than a method of forming a device using single-crystalline SOI (Silicon On Insulator). In the present specification, a semiconductor device using a polysilicon layer as an active region will be called a polysilicon semiconductor device, e.g., polysilicon MOSFET, and a semiconductor device using a single-crystalline silicon layer as an active region will be called a single-crystalline silicon semiconductor device, e.g., single-crystalline silicon MOSFET.
By forming a polysilicon MOSFET on the same chip as a power device, the chip area and cost can be reduced. However, a polysilicon MOSFET, and particularly an n-type MOSFET are poorer in saturation characteristics than a single-crystalline silicon MOSFET. According to the studies made by the present inventors, a comparator circuit or logic gate circuit using polysilicon MOSFETs, which is constituted similarly to a circuit using single-crystalline silicon MOSFETs, is poor in I/O characteristics, and the I/O gain is low.
FIG. 1 is a graph showing the static characteristics of an n-type polysilicon MOSFET. FIG. 2 is a graph showing the static characteristics of a p-type polysilicon MOSFET. In a MOSFET with excellent saturation characteristics formed using a single-crystalline silicon layer as an active region, the drain current comes close to a constant current at a high drain voltage (several V or more). To the contrary, the static characteristics of the n-type polysilicon MOSFET are characteristics in which the drain current increases with the drain voltage, and hardly exhibits any saturation characteristics. The static characteristics of the p-type polysilicon MOSFET are characteristics in which the drain current comes close to a constant current at a drain voltage of 2 to 4 V. A MOSFET having poor saturation characteristics cannot be directly used as an actual device.
Prior arts concerning the second aspect will be described. To protect a main semiconductor switch such as an IGBT (Insulated Gate Bipolar Transistor) for controlling the load of a motor or the like from an overcurrent, a technique of using an IGBT with a sense terminal as a main semiconductor switch and constituting a protection circuit using the sense terminal has been proposed. The xe2x80x9cIGBT with the sense terminalxe2x80x9d is an IGBT with a sense terminal prepared by extracting part of an emitter unit and separating it from the emitter. In the IGBT with the sense terminal, the ratio of (emitter terminal current:sense terminal current)=the ratio of (the number of emitter units: the number of sense units) is set to a given value. For example, these ratios are set to flow a sense current of 10 mA at a rated current of 20 A. If the IGBT changes to an overcurrent state, the sense current also increases in accordance with this. Thus, the sense terminal can be used as an overcurrent sense terminal.
In resent years, an LSI (Large-Scale Integrated circuit) in which many transistors and resistors are arranged to constitute predetermined electrical circuits and are integrated on one chip has widely been used. A technique of integrating a vertical or horizontal high-breakdown-voltage device and its control circuit receives a great deal of attention because this technique can reduce the device area. For practical use, the cost must be reduced. For this purpose, a method of forming a poly-crystalline layer on a high-breakdown-voltage device via an oxide film or the like, and forming a CMOS (Complementary Metal Oxide Semiconductor) or bipolar transistor on the poly-crystalline layer has been examined. This method can reduce the cost larger than a method of forming a device using single-crystalline SOI (Silicon On Insulator).
Recently, high-quality polysilicon can be produced by annealing amorphous silicon, laser-annealing polysilicon, or extracting seed crystals from single-crystalline silicon to grow them. According to these techniques, an oxide film is formed on a silicon substrate, and a high-quality polysilicon film is formed on the oxide film to constitute a polysilicon SOI substrate which can replace a conventional SOI substrate.
However, a field effect transistor having a MOS structure, i.e., MOSFET using polysilicon as an active region exhibits unique characteristics such as a higher threshold, poorer saturation characteristics, and larger gate capacitance than those of a MOSFET using a single crystal as an active region. To integrate a high-breakdown-voltage output device and its control circuit, a circuit capable of giving protection using a device having these characteristics must be constituted. That is, a circuit for detecting an overcurrent and a circuit for giving protection within a short time after a load short-circuit state must be formed using a MOSFET having the above-described characteristics.
It is an object of the present invention to provide a semiconductor device circuit for improving, by circuit design, poor saturation characteristics of a MISFET caused by using a polysilicon layer as an active region or by other causes. This realizes a circuit such as a comparator circuit or CMOS logic gate circuit equivalent to an ideal single-crystalline silicon circuit.
It is another object of the present invention to provide a semiconductor protection device for suppressing a current flowing through a main semiconductor switch to a set value or less and, more particularly, to a semiconductor protection device using polysilicon as an active region. In this case, it is still another object of the present invention to reduce the manufacturing cost of an integrated circuit on which the main semiconductor switch and semiconductor protection device are integrated.
According to a first object of the invention, there is provided a semiconductor device circuit comprising:
a sense circuit connecting a sense terminal, which flows a sense current branching from a current flowing through a path of the first and second main electrodes, and the control terminal of the switching element to each other, the sense circuit being configured to control the control terminal of the switching element based on the sense current to open the bypass, when the current flowing through the path of the first and second main electrodes exceeds the set value, thereby decreasing a voltage applied from the control power supply to the main control electrode.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumetalities and combinations particularly pointed out hereinafter.